Modern high speed electronic systems particularly computer systems very often require careful matching of printed circuit board trace lengths so the signal delays through there are identical. This is particularly true where there are multiple signal paths of a bus and where all of the signals sent through a bus at the same time are required to arrive at their destination port at an exact same time. Accordingly, equivalent lengths traces may be required. Often there will not be room on a circuit board for a set of 32 or 64 or some other number of parallel straight-line traces. A number of solutions have developed to enable the building of signal traces on circuit boards of particular lengths. One such example is found in NCR's U.S. Pat. No. 5,467,456 which details the use of serpentine traces for introducing signal delays in signal lines. Unisys also issued a patent in the area U.S. Pat. No. 6,256,769 showing a similar serpentine trace solution. Sun Microsystems has a patent U.S. Pat. No. 5,649,126 addressing related technical issues.
Through years of use of such solutions, certain inherent problems became apparent and more problematic as signal trace lines get smaller and closer together in order to save space on the circuit boards. Along with the obvious problem that serpentine patterns occupy more surface area than a straight line, the effect of the serpentine trace introduces effective propagation delay and signal integrity problems which do not occur with straight line traces. These effects are caused by self-coupling, or crosstalk, between the transmission wire carrying the signal onto the adjacent parallel transmission line segments. The effect of crosstalk on the adjacent coupled transmission line will produce a premature propagation of the signal from the source to the load. One solution already understood in the art is to space the serpentine lines apart from each other to eliminate the crosstalk effects. While this solution is helpful in some circumstances, as the space available on the board for the serpentine trace becomes reduced due to the economics of manufacturing and shrinking electronics, such solutions become unavailable. Often times there is just not enough room for routing serpentine traces on a single layer of the board and the adding of additional layers to the board to allow for such traces increases the complexity and cost of the printed circuit board with no substantial benefit other than to solve this problem.